A system board which partially constitutes an information apparatus is structured to control orders between sequential requests in response to a reception of an IO request. The IO request needs the order guarantee such that the subsequent request does not skip the precedent request. Upon request of the memory access, the system board controls the order to transmit the subsequent request to the memory after completion of the memory access based on the precedent request.
An IOC (Input/Output Controller) of the system board issues the subsequent request after receiving the response with respect to the memory access establishment. The IOC keeps the subsequent request for the period from transmission of the precedent request to the reception of the response. Thus, it costs a long time from reception of the request to completion of processing the subsequent request.
Arts disclosed in Japanese Laid-open Patent Publication No. 06-187231, Japanese Laid-open Patent Publication No. 04-190435, and Japanese Laid-open Patent Publication No. 2007-148507 have been proposed.